Parallel prefix sum

This file shows how to specify the permission flow of an efficient prefix sum implementation for GP-GPU.

General information

ID4
Articlenone
Back-endSilicon
LanguagePVL
FeaturesArrays, Barriers, GPU Kernels, Matrices
Sources
Path to example filecase-studies/prefixsum-drf.pvl
Date2017-06-12

Statistical information

Lines of code78 lines (comments not included)
Lines of specification42 lines (53.85% of the total)
Computation time828957 milliseconds

Example code

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